An Adaptive WTA using Floating Gate Technology

We have designed, fabricated, and tested an adaptive WinnerTake-All (WTA) circuit based upon the classic WTA of Lazzaro, et al [IJ. We have added a time dimension (adaptation) to this circuit to make the input derivative an important factor in winner selection. To accomplish this, we have modified the classic WTA circuit by adding floating gate transistors which slowly null their inputs over time. We present a simplified analysis and experimental data of this adaptive WTA fabricated in a standard CMOS 2f.tm process. 1 Winner-Take-All Circuits In a WTA network, each cell has one input and one output. For any set of inputs, the outputs will all be at zero except for the one which is from the cell with the maximum input. One way to accomplish this is by a global nonlinear inhibition coupled with a self-excitation term [2J. Each cell inhibits all others while exciting itself; thus a cell with even a slightly greater input than the others will excite itself up to its maximal state and inhibit the others down to their minimal states. The WTA function is important for many classical neural nets that involve competitive learning, vector quantization and feature mapping. The classic WTA network characterized by Lazzaro et. al. [IJ is an elegant, simple circuit that shares just one common line among all cells of the network to propagate the inhibition. Our motivation to add adaptation comes from the idea of saliency maps. Picture a saliency map as a large number of cells each of which encodes an analog value An Adaptive wrA using Floating Gate Technology 721 Vtun01 Vtun02 Vdd ± Vb1 ~C1 M4 , V i C2 V1 Vfg1 JLV~